The present invention relates to an information processing unit.
In a prior art information processing unit, immediate data that can be generated by a single instruction is limited to either integral data or logical data. Moreover, no arithmetic operation of the immediate data and the content of an arithmetic register can be executed. If such an operation is desired between the immediate data and the content of one selected arithmetic register, the former have to be once loaded into another selected arithmetic register, and only then can the desired operation be performed between the two registers.
Therefore, required processing may need extra instruction steps with a corresponding increase in processing time. Furthermore, to provide a unit with adequate functions, a greater variety of instructions are needed with more complicated instruction control and a greater number of arithmetic circuits.
One example of instruction formats used in the prior art unit is disclosed in "IBM System/370 Principles Operation" (Ninth Edition), published by International Business Machines Corporation in October 1981, pp. 5-3 and 5-4.
An object of the present invention is, therefore, to provide an information processing unit free from the above-mentioned disadvantages of the prior art processing unit.